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Dilip Vasudevan

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Dilip Vasudevan is currently a Research Associate in CEOL, Centre for Efficiency Oriented Languages, in the Department of Computer Science at UCC, Ireland. 

Currently he is working under the Science Foundation Ireland (SFI) funded project with Prof.Michel Schellekens. He is also associated with Electrical Engineering Department at UCC through this project working with Dr. Emanuel Popovici. He moved to CEOL by January 2009, from University of Edinburgh, UK, where he did his PhD in Informatics from 2006 to 2008.

His work was supported by Engineering Physical Sciences and Research Council (EPSRC). He received his Master of Science degree in computer engineering from University of Arkansas, USA (2005) and his Bachelor of Engineering in electronics and communication engineering from University of Madras, India (2003). 

His current research interests include Static Average-Case Analysis, Static Timing and Power Analysis, Algorithms for Automatic Test Pattern Generation, Defect Oriented Testing, Delay Fault Testing, Asynchronous Circuit Design, Reversible Architectures, Testing for 3D Architectures and fault-tolerant quantum computing.

For more information, see www.cs.ucc.ie/~dv2

 

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