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ICSA Colloquium Talk

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"The Multi-Core Approach to Keep Processors on Moore's Curve" by Antonio Gonzalez, Director, Intel-UPC Barcelona Research Center

What
  • Colloquium Series
When Mar 16, 2006
from 03:30 PM to 04:30 PM
Where JCMB, ROOM 2511
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Antonio Gonzalez
Director, Intel-UPC Barcelona Research Center

The Multi-Core Approach to Keep Processors on Moore's Curve

 

Advances in semiconductor process technology keep driving Moore's Law and provide a doubling of the transistor density about every two years. These advances have fueled the evolution in processor microarchitecture. In the past we have seen the transition from CISC to RISC, and later to superscalar organizations. More recently we are witnessing an increased emphasis on exploiting thread-level parallelism through the so-called multi-core chips. Multicore chips will become common in all market segments, from high-end servers to desktop and mobile PCs.

This talk will discuss some of the key challenges and opportunities presented by multi-core processors. In particular, aspects related scalability, adaptability, programmability and reliability will be discussed.

Bio

Antonio Gonzalez received his M.S. and Ph.D. degrees from the Universitat Politecnica de Catalunya (UPC), in Barcelona, Spain. He is the founding director of the Intel-UPC Barcelona Research Center, whose research focuses on new microarchitecture paradigms and code generation techniques for future microprocessors. He joined the faculty of the Computer Architecture Department of UPC in 1986 and became a Full Professor in 2002. He currently holds a part-time Professor position at this department.

His research has focused on computer architecture, compilers and parallel processing, with a special emphasis on processor microarchitecture and code generation. He has published over 200 papers, has given over 60 invited talks, has filed 14 patents and has advised 11 PhD thesis in the areas of Resilient Processors, Multicore Architectures, Power-Aware Microarchitectures; Clustered Microarchitectures; Speculative Multithreaded Processors; Data Value and Data Dependence Speculation and Reuse; Cache Architectures; Register File Architecture; Modulo Scheduling; Code Analysis and Optimization; Parallel Algorithms; Prolog-Oriented Architectures; Instruction Fetching Mechanisms; and Digital Image Processing.

Antonio Gonzalez is an Associate Editor of the IEEE Transactions on Computers, IEEE Transactions on Parallel and Distributed Systems, ACM Transactions on Architecture and Code Optimization, and Journal of Embedded Computing. He has served on over 90 program committees for international symposia in the field of computer architecture, including ISCA, MICRO, HPCA, PACT, ICS, ICCD, ISPASS, CASES and IPDPS. He has been program (co-) chair for ICS 2003, ISPASS 2003 and MICRO 2004, among other symposia.

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